FPGA Bitstream Reverse Engineering

FPGA Bitstream Reverse Engineering

FPGAs are a hot topic at the last few Defcons, but we have not seen much talk of hacking FPGAs. In this talk, we present two tools: one to decompile bitstreams into netlists, and one to decompile netlists into Verilog code. For those not familiar with FPGA internals, we will discuss how they work and their bitstream formats. It is highly recommended that attendees know at least some digital electronics/logic design basics.

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